About this job
CISCO Systems is hiring a Director - Engineering, ASIC - Physical Design (Silicon One) AI Scale Chips in San Jose, California. This is a full-time or part-time, on-site position, posted on October 05, 2026. The ideal candidate is comfortable with AI.
..., and hardware platforms for Cisco's core Switching, Routing, and Wireless products. With ~2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across...
This is a short version of the job ad. Press Apply now to read the full ad on Jooble.
Job details
- Company
- CISCO Systems
- Location
- San Jose, California, United States
- Work mode
- On-site
- Salary
- $250.6k - $362.6k
- Posted
- October 5, 2026
- Source
- Jooble
Questions about this job
Is this Director - Engineering, ASIC - Physical Design (Silicon One) AI Scale Chips role remote?
No. This is an on-site role in San Jose, California. Use the links below to find remote jobs too.
How much does this Director - Engineering, ASIC - Physical Design (Silicon One) AI Scale Chips job pay?
The advertised salary is $250.6k - $362.6k.
Which skills do I need?
The job description mentions AI.
How do I apply to CISCO Systems?
Press "Apply now". You will go to the original job ad on Jooble, where you can send your application.
How long is this job open?
It was posted on October 05, 2026 and is listed until November 04, 2026, unless the employer closes it earlier.